1. Field of the Invention
The present invention relates to a data driver circuit and a delay-locked loop (DLL) circuit, and more particularly, to a data driver circuit and a DLL circuit capable of operating normally in spite of an error, etc., caused when an analog data signal is applied to a display panel.
2. Discussion of Related Art
A data driver circuit functions to apply an analog data signal corresponding to a data signal transmitted from a timing controller to a display panel. The data driver circuit receives a clock signal (also referred to as a horizontal synchronization signal) synchronized with the data signal, together with the data signal from the timing controller, and may include a DLL to restore the original clock signal from the received clock signal. Meanwhile, when the analog data signal output from the data driver circuit to the display panel is changed, a large current momentarily flows from the data driver circuit to the display panel and causes noise in the data driver circuit (for example, the current momentarily changes a power supply voltage and/or ground voltage of the data driver circuit). Due to the noise, one or more clocks of a received clock signal input to the DLL may be lost, which may unlock the DLL. Once the DLL is unlocked, it takes a considerable amount of time to lock it again. Thus, errors in a received clock signal occurring within a short period of time have long-lasting repercussions due to unlocking of the DLL.